Quantum Circuit-Width Reduction through Parameterisation and Specialisation

As quantum computing technology continues to develop, the need for research into novel algorithms is growing. However, such cannot yet be reliably tested on actual hardware, which still limited in several ways, including qubit coherence times, connectivity, and available qubits. To facilitate development of despite this, simulators classical systems are used verify correctness an algorithm, study its behaviour under different error models. In general, this involves operating a memory space that grows exponentially with number work, we introduce circuit transformations allow construction parameterised circuits algorithms. The ideal form processed by compilation tools, can partially evaluated prior simulation, smaller specialised constructed eliminating fixed input We show significant reduction qubits various arithmetic circuits. Divide-by-n-bits integer dividers as example demonstration. It shown complexity reduces from 4n+2 3n+2 versions. For involving divide-by-8 operations, 28=256 required achieved reducing 137 GB 0.53 GB.